STM32 FSMC学习笔记

FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;

FSMC_NORSRAMTimingInitTypeDef FSMC_NORSRAMTimingInitStructure;

/*-- FSMC Configuration

------------------------------------------------------*/ /*----------------------- SRAM Bank 4 ----------------------------------------*/ /* FSMC_Bank1_NORSRAM4 configuration */

FSMC_NORSRAMTimingInitStructure.FSMC_AddressSetupTime = 1; FSMC_NORSRAMTimingInitStructure.FSMC_AddressHoldTime = 0; FSMC_NORSRAMTimingInitStructure.FSMC_DataSetupTime = 2;

FSMC_NORSRAMTimingInitStructure.FSMC_BusTurnAroundDuration = 0; FSMC_NORSRAMTimingInitStructure.FSMC_CLKDivision = 0; FSMC_NORSRAMTimingInitStructure.FSMC_DataLatency = 0; FSMC_NORSRAMTimingInitStructure.FSMC_AccessMode = FSMC_AccessMode_B;

/* Color LCD configuration ------------------------------------ LCD configured as follow:

- Data/Address MUX = Disable - Memory Type = SRAM - Data Width = 16bit

- Write Operation = Enable - Extended Mode = Enable

- Asynchronous Wait = Disable */

FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4; FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;

FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;

FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;

FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;

FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;

FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;

FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;

FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct =

&FSMC_NORSRAMTimingInitStructure;

FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &FSMC_NORSRAMTimingInitStructure;

FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);

/* - BANK 3 (of NOR/SRAM Bank 0~3) is enabled */ FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE); }