MEMORY存储芯片MK22FN1M0AVMC12中文规格书

Ratings4Ratings

4.1Thermal handling ratings

SymbolTSTGTSDRDescriptionStorage temperatureSolder temperature, lead-freeMin.–55—Max.150260Unit°C°CNotes121.Determined according to JEDEC Standard JESD22-A103, High Temperature Storage Life.

2.Determined according to IPC/JEDEC Standard J-STD-020, Moisture/Reflow Sensitivity Classification for Nonhermetic

Solid State Surface Mount Devices.

4.2Moisture handling ratings

SymbolMSLDescriptionMoisture sensitivity levelMin.—Max.3Unit—Notes11.Determined according to IPC/JEDEC Standard J-STD-020, Moisture/Reflow Sensitivity Classification for Nonhermetic

Solid State Surface Mount Devices.

4.3ESD handling ratings

SymbolVHBMVCDMILATDescriptionElectrostatic discharge voltage, human body modelElectrostatic discharge voltage, charged-device modelLatch-up current at ambient temperature of 105°CMin.-2000-500-100Max.+2000+500+100UnitVVmANotes1231.Determined according to JEDEC Standard JESD22-A114, Electrostatic Discharge (ESD) Sensitivity Testing Human Body

Model (HBM).

2.Determined according to JEDEC Standard JESD22-C101, Field-Induced Charged-Device Model Test Method for

Electrostatic-Discharge-Withstand Thresholds of Microelectronic Components.3.Determined according to JEDEC Standard JESD78, IC Latch-Up Test.

4.4Voltage and current operating ratings

K20 Sub-Family Data Sheet, Rev. 3, 6/2013.

Freescale Semiconductor, Inc.

11

GeneralSymbolVDDIDDVDIOVAIOIDVDDAVUSB_DPVUSB_DMVREGINVBATDescriptionDigital supply voltageDigital supply currentDigital input voltage (except RESET, EXTAL, and XTAL)Analog1, RESET, EXTAL, and XTAL input voltageMaximum current single pin limit (applies to all digital pins)Analog supply voltageUSB_DP input voltageUSB_DM input voltageUSB regulator inputRTC battery supply voltageMin.–0.3—–0.3–0.3–25VDD – 0.3–0.3–0.3–0.3–0.3Max.3.81855.5VDD + 0.325VDD + 0.33.633.636.03.8UnitVmAVVmAVVVVV1.Analog pins are defined as pins that do not have an associated general purpose I/O port function.

5General

5.1AC electrical characteristics

Unless otherwise specified, propagation delays are measured from the 50% to the 50%point, and rise and fall times are measured at the 20% and 80% points, as shown in thefollowing figure.

Figure 1. Input signal measurement reference

All digital I/O switching characteristics assume:1.output pins

?have CL=30pF loads,

?are configured for fast slew rate (PORTx_PCRn[SRE]=0), and?are configured for high drive strength (PORTx_PCRn[DSE]=1)2.input pins

?have their passive filter disabled (PORTx_PCRn[PFE]=0)

K20 Sub-Family Data Sheet, Rev. 3, 6/2013.

12

Freescale Semiconductor, Inc.