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基于单片机的路灯控制系统设计开题报告

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四、主要参考文献

[1] 查兵,崔浩.单片机原理[J].中国高新技术,2011年1期

[2] 李健,蒋全胜,任灵芝.智能路灯控制系统设计[J].工业控制计算机,2010年6期 [3] 金仁贵.单片机应用系统的开发方法[J].电脑知识与技术:学术交流,2006年12期

[4] 严怀龙.基于单片机的数据采集系统 [J].广西轻工业,2006年6期

[5] 王虎城,周晋军,皮依标,叶振华. 基于光传感器和单片机的校园路灯控制系统设计[J].科技广场,2011年1期

[6] 王立红. 基于单片机的智能路灯控制系统[J]. 网络财富,2010年6期 [7] 王皑,佘丹妮. 基于单片机的模拟路灯控制系统设计[J]. 仪表技术,2011年11期 [8] 张毅刚.单片机原理及应用[M].高等教育出版社,2003 [9] 阎石.数字电子技术基础[M].高等教育出版社,2006

[10] 童诗白,华成英.模拟电子技术基础[M].高等教育出版社,2006 [11] 程德福,林君.智能仪器[M].机械工业出版社,2009

[12] 刁鸣.常用电路模块分析与设计指导[M].清华大学出版社,2008 [13] Xu Jun, Peng Yonglong, Li Yabi. Study of Energy-saving Solar Street Light Using LED Based on MCU-controlled (J). Test & measurement technology. 2008, (10):29-31

[14] LIU Lianhao, A new street lamp controller design (J). Computing Technology and Automation, 1997, (4):61-63

[15] ZHANG Liqun, Single-chip single board controller from time to time in the street lamp factory control (J). Application of Energy Technologies, 1998, (4):33-34

[16] The Introduction of AT89C51

英文原文:(From: The Introduction of AT89C51)

The Introduction of AT89C51

Description

The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set and pinout. The on-chip Flash allows the

program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications.

Function characteristic

The AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.

Pin Description

VCC:Supply voltage. GND:Ground.

Port 0

Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance inputs.Port 0 may also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups.Port 0 also receives the code bytes during Flash programming,and outputs the code bytes during programverification. External pullups are required during programverification.

Port 1

Port 1 is an 8-bit bi-directional I/O port with internal pullups.The Port 1 output buffers can sink/source four TTL inputs.When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 1 also receives the low-order address bytes during Flash programming and verification.

Port 2

Port 2 is an 8-bit bi-directional I/O port with internal pullups.The Port 2 output buffers can sink/source four TTL inputs.When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 2 pins that are externally being pulled low will source current, because of the internal pullups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses. In this application, it uses strong internal pullupswhen emitting 1s. During accesses to external data memory that use 8-bit addresses, Port 2 emits the contents of the P2 Special Function Register.Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.

Port 3

Port 3 is an 8-bit bi-directional I/O port with internal pullups.The Port 3 output buffers can sink/source four TTL inputs.When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.Port 3 also serves the functions of various special features of the AT89C51 as listed below:

Port 3 also receives some control signals for Flash programming and verification. RST

Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. ALE/PROG

Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory.

If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode. PSEN

Program Store Enable is the read strobe to external program memory.When the

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