Computer Organization and Architecture
COURSE DESIGN
A Parallel Output Controller
------ (POC)
Southeast university
School of Information Science and Engineering
1. Design purpose
a. The purpose of this project is to design and simulate a parallel output controller (POC) which acts an interface between system bus and printer. The ISE 14.7 EDA tool is recommended and provided for simulation.
b. Learn about the using of Bi-directional Data Bus (BDB), and use a parallel Bi-directional Data Bus to finish the data transmission between CPU and POC.
2. Introduction and Tasks
POC is one of the most common I/O modules, namely the parallel output controller. It plays the role of an interface between the computer system bus and the peripheral
Figure 1. System structure diagram
As Fig.1 shows the inner connecting of a printer to the system bus through the POC. The com- munication between POC and the printer is controlled by a “handshake” protocol given in Fig.2.
Figure 2. The handshake-timing diagram between POC and the printer
The handshaking process is described as follows: When the printer is ready to receive a char- acter, it holds RDY=1. The POC must then hold a character at PD (parallel data) port and produce a pulse at the terminal TR (transfer request). The printer will change RDY to 0, take the character
at PD and hold RDY at 0 until the character has been printed (e.g. delay 5 or 10ms), then set RDY to 1 again when it is ready to receive the next character.
The buffer register BR is used to temporarily hold a character sent from the processor, which char- acter will be transferred to the printer later.
The status register SR is used for two control functions:
①SR7 serves as a ready flag to indicate POC is ready or not to receive a new character from the processor.
②SR0 is used to enable the interrupt requests sent by POC.
In interrupt mode, If SR0=1, then POC will send an interrupt request signal to processor when it is ready to receive a character (i.e., when SR7=1). If SR0=0, then POC will not interrupt.
The transfer of a character to POC via the system bus proceeds as follows:
In interrupt mode, SR0 is always 1.
After sending character to printer, POC sets the SR7 to 1, since SR0=1, the interrupt request signal (IRQ) is set to 0, which indicate an effective interrupt signal to the processor.
1、processor sets the value of SR7 &sets the value of BR
①When the processor detects the effective IRQ signal, the processor directly selects BR and writes a character into BR, (processor will never read the state of SR7, which is different with polling mode.)
②Then the processor sets the SR7 to 0, which indicates that the new character has been written into BR and not printed yet.
2、POC reads and sets the value of SR7& handshakes operations with the printer
①When POC detects that SR7 is set to 0, POC then proceeds to start the handshaking operations with the printer.
②After sending character to printer, POC sets the SR7 to 1, which indicates POC is ready to receive another character from the processor. The transfer cycle can now repeat.（① and ② are same with the polling state）
PS: During the handshaking operations between POC and printer, the processor does not try to access POC until it receives the interrupt request signal
3. The overall connection of the simulated printer and POC expressed in the top module form
Figure 3. The top module form of the project
4. Design description of the simulation input waveforms
The input and output of CPU,POC and printer are shown below: Processorj Pins Description Input the clock for the CPU running. Choose the mode for printing. When mode=’1’,select a interrupt mode. Receive the interrupt signal IRQ. When IRQ='1' , new data can be sent. Read data from poc. Write data into poc. Show the direction of the DOUT[7..0] and DIN[7..0] When rw='0', read data from POC. When 'rw'='1', write data to POC. Control the address read and write on POC. clk mode Input IRQ DIN[7..0] DOUT[7..0] rw Output A0
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