AD826FEATURESHigh Speed:50 MHz Unity Gain Bandwidth350 V/?s Slew Rate70 ns Settling Time to 0.01%Low Power:7.5 mA Max Power Supply Current Per AmpEasy to Use:Drives Unlimited Capacitive Loads50 mA Min Output Current Per AmplifierSpecified for +5 V, ?5 V and ?15 V Operation2.0 V p-p Output Swing into a 150 ? Load(VS = +5 V)Good Video PerformanceDifferential Gain & Phase Error of 0.07% & 0.11?Excellent DC Performance:2.0 mV Max Input Offset VoltageAPPLICATIONSUnity Gain ADC/DAC BufferCable Drivers8-and 10-Bit Data Acquisition SystemsVideo Line DriverActive FiltersPRODUCT DESCRIPTIONCONNECTION DIAGRAM8-Lead Plastic Mini-DIP and SO PackageOUT1–IN1+IN1V–12348765V+OUT2–IN2+IN2AD826The AD826 features high output current drive capability of50mA min per amp, and is able to drive unlimited capacitiveloads. With a low power supply current of 15 mA max for bothamplifiers, the AD826 is a true general purpose operationalamplifier.The AD826 is ideal for power sensitive applications such as videocameras and portable instrumentation. The AD826 can operatefrom a single +5 V supply, while still achieving 25 MHz of band-width. Furthermore the AD826 is fully specified from a single+5 V to ±15 V power supplies.The AD826 excels as an ADC/DAC buffer or active filter indata acquisition systems and achieves a settling time of 70 nsto 0.01%, with a low input offset voltage of 2 mV max. TheAD826 is available in small 8-lead plastic mini-DIP and SOpackages.The AD826 is a dual, high speed voltage feedback op amp. Itis ideal for use in applications which require unity gain stabilityand high output drive capability, such as buffering and cabledriving. The 50 MHz bandwidth and 350 V/μs slew rate makethe AD826 useful in many high speed applications including:video, CATV, copiers, LCDs, image scanners and fax machines.1k??VS3.3?F5V10090500ns0.01?FHP PULSEGENERATORVIN1k?50?32CL = 100pF1/2AD8261VOUTTEKTRONIXP6201 FETPROBETEKTRONIX7A24 FETPREAMP100.01?FCL3.3?F–VSCL = 1000pF0%5VDriving a Large Capacitive LoadAD826–SPECIFICATIONS(@ T = +25?C, unless otherwise noted)
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AD826
THEORY OF OPERATION
The AD826 is a low cost, wide band, high performance dual operational amplifier which can drive heavy capacitive and resistive loads. It also achieves a constant slew rate, bandwidth and settling time over its entire specified temperature range. The AD826 (Figure 35) consists of a degenerated NPN
differential pair driving matched PNPs in a folded-cascode gain stage. The output buffer stage employs emitter followers in a class AB amplifier which delivers the necessary current to the load while maintaining low levels of distortion.
+VS
CFOUTPUT
–IN
+IN
–VS
NULL1NULL8Figure 35. Simplified Schematic
The capacitor, CF, in the output stage mitigates the effect of capacitive loads. With low capacitive loads, the gain from the compensation node to the output is very close to unity. In this case, CF is bootstrapped and does not contribute to the overall compensation capacitance of the device. As the capacitive load is increased, a pole is formed with the output impedance of the output stage. This reduces the gain, and therefore, CF is incompletely bootstrapped. Effectively, some fraction of CF
contributes to the overall compensation capacitance, reducing the unity gain bandwidth. As the load capacitance is further increased, the bandwidth continues to fall, maintaining the stability of the amplifier.
INPUT CONSIDERATIONS
An input protection resistor (RIN in Figure 25) is required in circuits where the input to the AD826 will be subjected to transient or continuous overload voltages exceeding the ±6 V maximum differential limit. This resistor provides protection for the input transistors by limiting their maximum base current.
For high performance circuits, it is recommended that a
“balancing” resistor be used to reduce the offset errors caused by bias current flowing through the input and feedback resistors. The balancing resistor equals the parallel combination of RIN and RF and thus provides a matched impedance at each input terminal. The offset voltage error will then be reduced by more than an order of magnitude.
APPLYING THE AD826
The AD826 is a breakthrough dual amp that delivers precision and speed at low cost with low power consumption. The AD826 offers excellent static and dynamic matching characteristics, combined with the ability to drive heavy resistive and capacitive loads. As with all high frequency circuits, care should be taken to maintain overall device performance as well as their matching. The following items are presented as general design considerations.
Circuit Board Layout
Input and output runs should be laid out so as to physically isolate them from remaining runs. In addition, the feedback resistor of each amplifier should be placed away from the feedback resistor of the other amplifier, since this greatly reduces inter-amp coupling.
Choosing Feedback and Gain Resistors
In order to prevent the stray capacitance present at each amplifier’s summing junction from limiting its performance, the feedback resistors should be ≤1 kΩ. Since the summing junction capacitance may cause peaking, a small capacitor (1 pF–5pF) maybe paralleled with RF to neutralize this effect. Finally, sockets should be avoided, because of their tendency to increase interlead capacitance.
Power Supply Considerations
To ensure the proper operation of the AD826, connect the positive supply before the negative supply. Also, proper power supply decoupling is critical to preserve the integrity of high frequency signals. In carefully laid out designs, decoupling capacitors should be placed in close proximity to the supply pins, while their lead lengths should be kept to a minimum. These measures greatly reduce undesired inductive effects on the amplifier’s response.
Though two 0.1 μF capacitors will typically be effective in decoupling the supplies, several capacitors of different values can be paralleled to cover a wider frequency range.
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?SINGLE SUPPLY OPERATIONAn exciting feature of the AD826 is its ability to perform well in asingle supply configuration (see Figure 37). The AD826 is ideallysuited for applications that require low power dissipation and highoutput current and those which need to drive large capacitiveloads, such as high speed buffering and instrumentation.Referring to Figure 36, careful consideration should be given tothe proper selection of component values. The choices for thisparticular circuit are: (R1 + R3)?R2 combine with C1 to form alow frequency corner of approximately 30 Hz.R3 and C2 reduce the effect of the power supply changes on theoutput by low-pass filtering with a corner at 1.2 πR3C2The values for RL and CL were chosen to demonstrate theAD826’s exceptional output drive capability. In this configura-tion, the output is centered around 2.5 V. In order to eliminatethe static dc current associated with this level, C3 was insertedin series with RL.REV. C
AD826
SINGLE-ENDED TO DIFFERENTIAL LINE DRIVEROutstanding CMRR (> 80 dB @ 5 MHz), high bandwidth, widesupply voltage range, and the ability to drive heavy loads, makethe AD826 an ideal choice for many line driving applications.In this application, the AD830 high speed video differenceamp serves as the differential line receiver on the end of a backterminated, 50 ft., twisted-pair transmission line (see Figure 40).The overall system is configured in a gain of +1 and has a –3 dBbandwidth of 14 MHz. Figure 39 is the pulse response with a2 V p-p, 1 MHz signal input.2V10090200ns100%2VFigure 39.Pulse Response?15V0.01?F50 FEET TWISTED PAIR Z = 72??15V0.01?FIN0.1?F2.2?F36?0.1?F1.05k?BNC5pF1.05k?5pF1/2AD82636?VOUT1.05k?1.05k?36?36?AD8301/2AD8260.01?F–15V–15V0.1?F2.2?F0.01?F0.1?FFigure 40.Differential Line DriverLOW DISTORTION LINE DRIVER1.1k??VS1?FThe AD826 can quickly be turned into a powerful, low distor-tion line driver (see Figure 41). In this arrangement the AD826can comfortably drive a 75? back-terminated cable, with a5MHz, 2 V p-p input; all of this while achieving the harmonicdistortion performance outlined in the following table.Configuration1.No Load2.150 ? RL Only3.150? RL 7.5? RC2nd Harmonic–78.5 dBm–63.8 dBm–70.4 dBm1k?0.1?F1/2AD826RC7.5?1k?1k?In this application one half of the AD826 operates at a gain of2.1 and supplies the current to the load, while the other pro-vides the overall system gain of 2. This is important for tworeasons: the first is to keep the bandwidth of both amplifiers thesame, and the second is to preserve the AD826’s ability to oper-ate from low supply voltages. RC varies with the load and mustbe chosen to satisfy the following equation:RC = MRLwhere M is defined by [(M+ 1) GS = GD] and GD = Driver’s Gain,GS = System Gain.1/2AD8261?F75?75?RL75?0.1?FFigure 41.Low Distortion AmplifierREV. C
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