第一范文网 - 专业文章范例文档资料分享平台

FPGA可编程逻辑器件芯片XC2S15-5FGG456C中文规格书 - 图文

来源:用户分享 时间:2025/6/17 9:27:21 本文由loading 分享 下载这篇文档手机版
说明:文章内容仅供预览,部分内容可能不全,需要完整文档或者需要复制内容,请下载word后使用。下载word有问题请添加微信号:xxxxxxx或QQ:xxxxxx 处理(尽可能给您提供完整文档),感谢您的支持与谅解。

Providing Power

Filter Network Design Guidelines

The selection criteria for the filter network are:????

Place the filter network as close as possible to the device power pin.

Ensure a low-inductance connection between the capacitor and the power pin.Simulate the filter circuit and optimize it, if possible.

Isolate the analog supply plane between the filter and the FPGA pin. Make sure thatno signals can capacitively or inductively couple into this supply.

Boundary-Scan Testing Guidelines

If Boundary-Scan(1) is to be used as part of the product verification, make sure that the analog supply voltage pin MGTAVCC of all GTX_DUAL tiles of the device are powered. The analog supply voltage pin MGTAVCC of all unused GTX_DUAL tiles must be

connected to the same supply that supplies VCCINT. VCCINT is the power supply pin for the internal core logic.

Providing Power

Overview

This section focuses on the various configurations of powering the GTX transceivers for optimal power consumption and minimizing board real-estate for filtering schemes.

Description

This subsection describes various use cases for powering the GTX transceivers. The specific rules used to derive these cases are described in “Resistor Calibration Circuit,” page 255 and “Power Supply Design and Filtering,” page 260.Note:

?

MGTAVTTRXC, MGTAVTTRXC_R, MGTAVTTRXC_L, MGTRREF, MGTRREF_Land MGTRREF_R are column-specific, not dual-specific. They are repeated in alluse cases for completeness.

These use case descriptions do not specifically reference the MGT*_L or MGT*_Rpower supplies. For TXT devices, it is assumed that the given recommendationsapply to the appropriate column in use.

?

1.Using any of the following JTAG operations (INTEST, EXTEST, SAMPLE, or PRELOAD), configuration via JTAG or ChipScope? tool operations is NOT affected.

RocketIO GTX Transceiver User GuideUG198 (v3.0) October 30, 2009

Chapter 10:GTX-to-Board Interface

Partially Used Column

Table10-6 shows the configuration for Use Case 1, where:???

A GTX_DUAL tile is usedOne or both transceivers are usedBoundary-Scan is always functional

Use Case 1

Connect ToGND(1) or transmitterFloating, no connection(2), or

receiverFloating, no connection(3), or

reference clock source1.2V dedicated supply(4)1.2V dedicated supply(4)

MGTAVTTRX(5)1.0V dedicated supply(4)1.0V dedicated supply(4)MGTAVTTTX with resistor(6)

Filter---YYYYY-Pin or Pin PairMGTRXP/MGTRXNMGTTXP/MGTTXNMGTREFCLKP/MGTREFCLKN

MGTAVTTTXMGTAVTTRXMGTAVTTRXCMGTAVCCPLLMGTAVCCMGTRREF

Notes:

1.2.3.4.5.6.

If only a single transceiver is used, connect the pins of the unused transceiver to GND.If only single transceiver is used, leave the pins of the unused transceiver floating.If the reference clock input is unused, leave the pins floating.Refer to Figure10-5, page262.Refer to Figure10-3, page257.

Refer to Figure10-1, page256 and Figure10-4, page258.

Table 10-6:

Table10-7 shows the configuration for Use Case 2, where:???

A GTX_DUAL tile is unusedBoth transceivers are unusedBoundary-Scan is not functioning

Use Case 2

Connect To

GND

Floating, no connectionFloating, no connection

GNDGNDMGTAVTTRX(1)

GND

Filter-----Y-Pin or Pin PairMGTRXP/MGTRXNMGTTXP/MGTTXNMGTREFCLKP/MGTREFCLKN

MGTAVTTTXMGTAVTTRXMGTAVTTRXCMGTAVCCPLL

Table 10-7:

RocketIO GTX Transceiver User Guide

UG198 (v3.0) October 30, 2009

Providing Power

Table 10-7:Use Case 2 (Cont’d)

Connect To

GND

MGTAVTTTX with resistor(2)

Filter--

Pin or Pin PairMGTAVCCMGTRREF

Notes:

1.Connect to MGTAVTTRX of a used GTX_DUAL tile. Refer to Figure10-3, page257.

2.Connect to MGTAVTTTX of a used GTX_DUAL tile. Refer to Figure10-1, page256 and Figure10-4,page258.

Table10-8 shows the configuration for Use Case 3, where:???

A GTX_DUAL tile is unusedBoth transceivers are unusedBoundary-Scan is functioning

Use Case 3

Connect To

GND

Floating, no connectionFloating, no connection

GNDGNDMGTAVTTRX(1)

GNDVCCINT

MGTAVTTTX with resistor(2)

Filter-----Y---Pin or Pin PairMGTRXP/MGTRXNMGTTXP/MGTTXNMGTREFCLKP/MGTREFCLKN

MGTAVTTTXMGTAVTTRXMGTAVTTRXCMGTAVCCPLLMGTAVCCMGTRREF

Notes:

1.Connect to MGTAVTTRX of a used GTX_DUAL tile. Refer to Figure10-3, page257.

2.Connect to MGTAVTTTX of a used GTX_DUAL tile. Refer to Figure10-1, page256 and Figure10-4,page258.

Table 10-8:

Table10-9 shows the configuration for Use Case 4, where:???

A GTX_DUAL tile is used only for forwarding resistor calibration informationgenerated in the center tile of the columnBoth transceivers are unusedBoundary-Scan is always functional

Use Case 4

Connect To

GND

Floating, no connectionFloating, no connection

GND

Filter----Pin or Pin PairMGTRXP/MGTRXNMGTTXP/MGTTXNMGTREFCLKP/MGTREFCLKN

MGTAVTTTX

Table 10-9:

RocketIO GTX Transceiver User GuideUG198 (v3.0) October 30, 2009

Chapter 10:GTX-to-Board Interface

RocketIO GTX Transceiver User Guide

UG198 (v3.0) October 30, 2009

Section 2: Board Level Design

RocketIO GTX Transceiver User Guide

UG198 (v3.0) October 30, 2009

FPGA可编程逻辑器件芯片XC2S15-5FGG456C中文规格书 - 图文.doc 将本文的Word文档下载到电脑,方便复制、编辑、收藏和打印
本文链接:https://www.diyifanwen.net/c2ld5o1jiwa3cwgi893aj3uh255c6oi00c3z_1.html(转载请注明文章来源)
热门推荐
Copyright © 2012-2023 第一范文网 版权所有 免责声明 | 联系我们
声明 :本网站尊重并保护知识产权,根据《信息网络传播权保护条例》,如果我们转载的作品侵犯了您的权利,请在一个月内通知我们,我们会及时删除。
客服QQ:xxxxxx 邮箱:xxxxxx@qq.com
渝ICP备2023013149号
Top