FPGA电路设计中的毛刺问题的研究
目 录
1 引言 .............................................................. 1 2 FPGA的相关概念 .................................. 错误!未定义书签。
2.1 FPGA的基本特点 .............................................. 1 2.2 FPGA的工作原理 .............................................. 1 3 简述FPGA电路中毛刺的产生 ......................................... 2
3.1 毛刺产生的原因 .............................................. 2 3.2 毛刺产生条件的分析 ......................... 错误!未定义书签。 4 毛刺的消除方法 .................................................... 2
4.1 冗余项法 ................................... 错误!未定义书签。 4.2 采样法 ..................................... 错误!未定义书签。 4.3 吸收法 ..................................... 错误!未定义书签。 4.4 延迟法 ..................................... 错误!未定义书签。 4.5状态机控制法 ................................................. 2 4.6 硬件描述语言法 ............................. 错误!未定义书签。 5 实例 ............................................. 错误!未定义书签。
5.1 输出加D触发器 .............................................. 4 5.2在有限状态机的基础上采用时钟同步信号 ......................... 6 5.3直接把状态机的状态码作为输出信号 ............................. 8
6 结语 ............................................................. 10 参考文献 ........................................................... 11 致 谢 .............................................................. 12
FPGA电路设计中的毛刺问题的研究
摘要:目前,FPGA器件已经越来越广泛地应用在数字电路设计等领域,但它的毛刺问题却成为一个影响其可靠性和精确性的重要因素。本文探讨了毛刺产生的原因及产生的条件,以计数器和乘法器为例对解决方案进行了深入具体地分析,总结了多种不同的解决方法,并且通过仿真说明这几种方法能够有效地消除或在一定程度上减少数字电路设计中出现的毛刺。
Burr problem of FPGA circuit design research
Abstract: The FPGA device at present, already more and more widely used in the field of digital circuit design and so on, but the burr problem has become one of important factors affecting its reliability and accuracy. Burr phenomenon is very common in the FPGA design, and the emergence of the burr tends to lead to the system results error. This paper discusses the cause of burr and the creation of
conditions, to counter and multiplier as an example for solutions conducted in-depth analysis in detail, summarizes the different types of solutions, and through the
simulation shows that these methods can effectively eliminate or reduce to a certain extent burr in digital circuit design.
Key words:FPGA; Burr; Sampling; Competition adventure
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