FPGA课程设计--基于VHDL的2FSK的信号发生器

COUNT<=COUNT+1;

CLK240 <= NOT CLK240;--输出时钟翻转一次 ELSE COUNT<=COUNT+1; END IF; END IF; END PROCESS;

PROCESS(CLK240) --分频为120KHz的CLK120信号 BEGIN

IF (CLK240'EVENT AND CLK240 = '1') THEN CLK120<=NOT CLK120; END IF; END PROCESS;

PROCESS(CLK120) --LOAD_CLK1 100分频得到CODERATE码元速率1.2KHz BEGIN

IF (CLK120'EVENT AND CLK120= '1') THEN IF(COUNT50=49) THEN COUNT50<=0;

CODERATE<=NOT CODERATE; ELSE COUNT50<=COUNT50+1; END IF; END IF; END PROCESS;

M_SEQUENCE_FORM: --产生\序列 PROCESS(CODERATE) BEGIN

IF(CODERATE'EVENT AND CODERATE= '1') THEN M(0)<=M(1); --实现移位功能 M(1)<=M(2); END IF;

END PROCESS;

PROCESS(CODERATE) BEGIN

IF(CODERATE'EVENT AND CODERATE= '1') THEN

M(2)<=(M(1) XOR M(0)) OR (NOT (M(0) OR M(1) OR M(2))); --逻辑表达式跟上面的移位功能产生m的随机序列“1110010” END IF; END PROCESS;

M_CODE<=M(0);

PROCESS(MODE,CLK240,CLK120,M_CODE) BEGIN

IF (MODE='0' AND M_CODE='0') THEN SINCLK<=CLK120;

ELSE SINCLK<=CLK240; --选择正弦信号波产生器的时钟频率 END IF; END PROCESS;

JUMP_HIGH<=(NOT TEMP) AND M_CODE; --0到1跳变 JUMP_LOW<=(NOT M_CODE) AND TEMP; --1到0跳变

PROCESS(SINCLK) --2FSK与2PSK对跳变的不同处理 BEGIN

IF(SINCLK'EVENT AND SINCLK= '1') THEN TEMP<=M_CODE;

IF((COUNT100=99) OR (JUMP_HIGH='1')) THEN COUNT100<=0; --波形输出 ELSIF((JUMP_LOW='1') AND (MODE='1')) THEN COUNT100<=50; ELSE COUNT100<=COUNT100+1; END IF;

END IF; END PROCESS;

PROCESS(COUNT100) --产生sin周期波形的1个周期内的100个样点值 BEGIN

CASE COUNT100 IS

when 0=>value<=\ when 1=>value<=\ when 2=>value<=\ when 3=>value<=\ when 4=>value<=\ when 5=>value<=\ when 6=>value<=\ when 7=>value<=\ when 8=>value<=\ when 9=>value<=\ when 10=>value<=\ when 11=>value<=\ when 12=>value<=\ when 13=>value<=\ when 14=>value<=\ when 15=>value<=\ when 16=>value<=\ when 17=>value<=\ when 18=>value<=\ when 19=>value<=\ when 20=>value<=\ when 21=>value<=\ when 22=>value<=\ when 23=>value<=\

when 24=>value<=\ when 25=>value<=\ when 26=>value<=\ when 27=>value<=\ when 28=>value<=\ when 29=>value<=\ when 30=>value<=\ when 31=>value<=\ when 32=>value<=\ when 33=>value<=\ when 34=>value<=\ when 35=>value<=\ when 36=>value<=\ when 37=>value<=\ when 38=>value<=\ when 39=>value<=\ when 40=>value<=\ when 41=>value<=\ when 42=>value<=\ when 43=>value<=\ when 44=>value<=\ when 45=>value<=\ when 46=>value<=\ when 47=>value<=\ when 48=>value<=\ when 49=>value<=\ when 50=>value<=\ when 51=>value<=\ when 52=>value<=\ when 53=>value<=\