Syntax Description
TST{cond} Rn, Op2
performs a bitwise AND operation on the value in Rn and the value of Op2.
This is similar to the ANDS instruction, except that the result is discarded.
Condition Flags N and Z flags are updated according the result. C flag may be updated during the calculation of Op2. Example
TSTNE r1,r5,ASR r1
MUL
Multiply (32-bit by 32-bit, bottom 32-bit result). Syntax Description
MUL{cond}{S} Rd, Rm, Rs
multiplies the values from Rm and Rs, and places the least significant
If S is specified:
32 bits of the result in Rd. Condition Flags
? ? ?
N and Z flags according to the result.
the C flag in ARM architecture v4 and earlier will be corrupted. the C flag in ARM architecture v5 and later is not affected.
Example
MUL R10, R2, R5 //R10:= R2*R5
3．分支控制指令
B, BL, BX, BLX, and BXJ
B
Branch to label. Used to jump to a specific program location. Syntax Description
B{cond} label
The jump distance must be within -252 to +258 bytes for conditional
and ±2 KBytes for unconditional branch. Condition Flags not modified. Example
CMP
R1,#10 // compare R10 with #10
BEQ val_ok // jump to label val_ok val_ok: val_err:
B val_err // jump to itself (loop forever)
BL
Branch with Link. Use to call subroutines. Syntax Description
BL{cond} label
Copy address of next instruction to R14 and jump to label. The jump
distance must be within ±4Mb of the current instruction. Note that this mnemonic is generated as two 16-bit Thumb instructions. Condition Flags not modified. Example
BL sub+ROM //Call subroutine at
computed address
ADDS R1,#1 //Add 1 to register 1, setting CPSR flags on the result then call subroutine if the C flag is clear, wich will be the case
BX
Branch indirect and switch CPU mode (Thumb / ARM) as required. Syntax Description Example
BX{cond} Rm
Branch to address in Rm. Change to ARM mode if bit 0 of Rm is clear.
//unless R1 held 0xFFFFFFFF
Condition Flags not modified.
BX R5 // branch indirect to address function
4.ARM伪指令
1.符号定义伪指令
GBLA, GBLL, and GBLS LCLA, LCLL, and LCLS
2.数据定义伪指令
DCB
DCD and DCDU
5.条件代码
Condition Code
Most ARM instructions and the Thumb Branch instruction include a condition code field. This field is marked in the CPU instructions with {cond}.
A conditional instruction is only executed on match of the condition flags in the Program Status Register. For example, the BEQ (B instruction with EQ condition) branches only if the Z flag is set. If the {cond} field is empty the instruction is always executed.
{cond} Suffix EQ NE CS/HS CC/LO MI PL VS VC HI LS GE LT GT LE AL
Tested Status Flags Z set Z clear C set C clear N set N clear V set V clear
C set and Z clear C clear or Z set N equals V N not equal to V
Z clear AND (N equals V) Z set OR (N not equal to V) (ignored)
Description equal not equal
unsigned higher or same unsigned lower negative positive or zero overflow no overflow unsigned higher unsigned lower or same signed greater or equal signed less than signed greater than signed less than or equal always (usually omitted)
Examples:
CMP R5,#10 // compare R5 with 10
BHI lab1 // branch to lab1 if value in R5 is higher than 10 : lab1:
TST R5,#10 // test content of R5 against 10 ADDEQ R6,#40 // add 40 to R6 if R5 contains 10
6.移位类型
The ARM CPU has very powerful shift operations that can be used together with standard CPU instructions. The various shift types are explained below:
Logical Shift Right (LSR)
Logical shift right is encoded with LSR #n or LSR Rs in the Op2 field. The value 0 is shifted into bit 31 and the Carry flag (C) holds the last bit shifted out.
Logical Shift Left (LSL)
Logical shift left is encoded with LSL #n or LSL Rs in the Op2 field. The value 0 is shifted into bit 0 and the Carry flag (C) holds the last bit shifted out.
Arithmetic Shift Right (ASR)
Arithmetic shift right is encoded with ASR #n or ASR Rs in the Op2 field. The sign bit (bit 31 of value) is shifted into the high bit 31 and the Carry flag (C) holds the last bit shifted out.
Rotate Right (ROR)
Rotate right is encoded with ROR #n in the Op2 field. Bit 0 of the value is shifted into bit 31. The Carry flag (C) holds the last bit shifted out.
相关推荐：
loading