TDC-GP2与MSP430F413通讯C程序

Px.x/ACLK By 2 */

#define FLL_DIV_4 (0x02) /* FLL+ Divide Px.x/ACLK By 4 */

#define FLL_DIV_8 (0x03) /* FLL+ Divide Px.x/ACLK By 8 */

#define SELM_DCO (0x00) /* Select DCO for CPU MCLK */

#define SELM_XT2 (0x10) /* Select XT2 for CPU MCLK */

#define SELM_A (0x18) /* Select A (from LFXT1) for CPU MCLK */

#define SMCLKOFF (0x40) /* Peripheral Module Clock (SMCLK) disable */

/* INTERRUPT CONTROL BITS */

/* These two bits are defined in the Special Function Registers */ /* #define OFIFG 0x02 */ /* #define OFIE 0x02 */

/************************************************************ * Brown-Out, Supply Voltage Supervision (SVS)

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************************************************************/

#define SVSCTL_ (0x0056) /* SVS Control */ DEFC( SVSCTL , SVSCTL_) #define SVSFG (0x01) #define SVSOP (0x02) #define SVSON (0x04) #define PORON (0x08) #define VLDOFF (0x00) #define VLDON (0x10) #define VLD_1_8V (0x10)

/************************************************************ * LCD

************************************************************/

#define LCDCTL_ (0x0090) /* LCD Control */ DEFC( LCDCTL , LCDCTL_)

/* the names of the mode bits are different from the spec */ #define LCDON (0x01) #define LCDLOWR (0x02) #define LCDSON (0x04)

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#define LCDMX0 (0x08) #define LCDMX1 (0x10) #define LCDP0 (0x20) #define LCDP1 (0x40) #define LCDP2 (0x80) /* Display modes coded with Bits 2-4 */ #define LCDSTATIC (LCDSON)

#define LCD2MUX (LCDMX0+LCDSON) #define LCD3MUX (LCDMX1+LCDSON)

#define LCD4MUX (LCDMX1+LCDMX0+LCDSON)

/* Group select code with Bits 5-7 Seg.lines Dig.output */

#define LCDSG0 (0x00) /* --------- Port Only (default) */

#define LCDSG0_1 (LCDP0) /* S0 - S15 see Datasheet */

#define LCDSG0_2 (LCDP1) /* S0 - S19 see Datasheet */

#define LCDSG0_3 (LCDP1+LCDP0) /* S0 - S23 see Datasheet */

#define LCDSG0_4 (LCDP2) /* S0 - S27 see Datasheet */

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#define LCDSG0_5 (LCDP2+LCDP0) /* S0 - S31 see Datasheet */

#define LCDSG0_6 (LCDP2+LCDP1) /* S0 - S35 see Datasheet */

#define LCDSG0_7 (LCDP2+LCDP1+LCDP0) /* S0 - S39 see Datasheet */

/* NOTE: YOU CAN ONLY USE THE 'S' OR 'G' DECLARATIONS FOR A COMMAND */

/* MOV #LCDSG0_3+LCDOG2_7,&LCDCTL ACTUALY MEANS MOV #LCDP1,&LCDCTL! */

#define LCDOG1_7 (0x00) /* --------- Port Only (default) */

#define LCDOG2_7 (LCDP0) /* S0 - S15 see Datasheet */

#define LCDOG3_7 (LCDP1) /* S0 - S19 see Datasheet */

#define LCDOG4_7 (LCDP1+LCDP0) /* S0 - S23 see Datasheet */

#define LCDOG5_7 (LCDP2) /* S0 - S27 see Datasheet */

#define LCDOG6_7 (LCDP2+LCDP0) /* S0 - S31 see Datasheet */

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