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MEMORY存储芯片MT29F4G08ABADAH4-ITD中文规格书 - 图文

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Packaging

Package Dimensions

Figure 8: 84-Ball FBGA Package (8mm x 12.5mm) – x16 Die Rev :H

0.155Seating plane1.8 CTRNonconductiveovermold

84X ?0.45Dimensions applyto solder ballspost-reflow on?0.35 SMD ball pads.A0.12ABall A1 ID987321ABCDEFGHJKLMNPRBall A1 ID12.5 ±0.111.2 CTR0.8 TYP0.8 TYP6.4 CTR8 ±0.1Notes:

1.1 ±0.10.25 MINExposed gold plated pad1.0 MAX X 0.7 nominal.1.All dimensions are in millimeters.

2.Solder ball material: SAC305 (96.5% Sn, 3% Ag, 0.5% Cu) or leaded Eutectic (62% Sn,

36%Pb, 2% Ag).

PDF: 09005aef8565148a

1GbDDR2.pdf – Rev. Y 02/14 EN

1Gb: x4, x8, x16 DDR2 SDRAM

Electrical Specifications – Absolute Ratings

Die RevisionPackage60-ballH184-ball60-ballM184-ballSubstrate(pcb)2-layer4-layer2-layer4-layerLow ConductivityHigh ConductivityLow ConductivityHigh Conductivityθ JA (°C/W)θ JA (°C/W)θ JA (°C/W)Airflow = 0m/sAirflow = 1m/sAirflow = 2m/sθ JB (°C/W)θ JC (°C/W)72.554.568.851.385.463.280.859.755.545.752.042.770.656.167.053.349.542.346.539.664.552.861.650.735.635.232.532.342.844.711.711.75.65.7Note:

1.Thermal resistance data is based on a number of samples from multiple lots and should

be viewed as a typical number.

PDF: 09005aef8565148a

1GbDDR2.pdf – Rev. Y 02/14 EN

1Gb: x4, x8, x16 DDR2 SDRAM

Output Electrical Characteristics and Operating Conditions

Output Electrical Characteristics and Operating Conditions

Table 18: Differential AC Output Parameters

ParameterAC differential cross-point voltageAC differential voltage swingNote:

SymbolVOX(AC)VswingMin0.50 × VDDQ - 1251.0Max0.50 × VDDQ + 125–UnitsmVmVNotes11.The typical value of VOX(AC) is expected to be about 0.5 × VDDQ of the transmitting de-vice and VOX(AC) is expected to track variations in VDDQ. VOX(AC) indicates the voltage atwhich differential output signals must cross.

Figure 15: Differential Output Signal Levels

VDDQ

VTRVswingCrossing pointVOX

VCPVSSQ

Table 19: Output DC Current Drive

ParameterOutput MIN source DC currentOutput MIN sink DC currentNotes:

SymbolIOHIOLValue–13.413.4UnitsmAmANotes1, 2, 42, 3, 41.For IOH(DC); VDDQ = 1.7V, VOUT = 1,420mV. (VOUT - VDDQ)/IOH must be less than 21Ω for val-ues of VOUT between VDDQ and VDDQ - 280mV.

2.For IOL(DC); VDDQ = 1.7V, VOUT = 280mV. VOUT/IOL must be less than 21Ω for values of VOUT

between 0V and 280mV.

3.The DC value of VREF applied to the receiving device is set to VTT.

4.The values of IOH(DC) and IOL(DC) are based on the conditions given in Notes 1 and 2. They

are used to test device drive current capability to ensure VIH,min plus a noise margin andVIL,max minus a noise margin are delivered to an SSTL_18 receiver. The actual current val-ues are derived by shifting the desired driver operating point (see output IV curves)along a 21Ω load line to define a convenient driver current for measurement.

PDF: 09005aef8565148a

1GbDDR2.pdf – Rev. Y 02/14 EN

1Gb: x4, x8, x16 DDR2 SDRAM

Output Electrical Characteristics and Operating Conditions

Table 20: Output Characteristics

ParameterOutput impedancePull-up and pull-down mismatchOutput slew rateNotes:

Min01.5Nom––Max45UnitsΩΩV/nsNotes1, 21, 2, 31, 4, 5, 6See Output Driver Characteristics (page 53)1.Absolute specifications: 0°C ≤ TC ≤ +85°C; VDDQ = 1.8V ±0.1V, VDD = 1.8V ±0.1V.

2.Impedance measurement conditions for output source DC current: VDDQ = 1.7V; VOUT =

1420mV; (VOUT - VDDQ)/IOH must be less than 23.4Ω for values of VOUT between VDDQ andVDDQ - 280mV. The impedance measurement condition for output sink DC current: VDDQ= 1.7V; VOUT = 280mV; VOUT/IOL must be less than 23.4Ω for values of VOUT between 0Vand 280mV.

3.Mismatch is an absolute value between pull-up and pull-down; both are measured at

the same temperature and voltage.

4.Output slew rate for falling and rising edges is measured between VTT - 250mV and VTT

+250mV for single-ended signals. For differential signals (DQS, DQS#), output slew rateis measured between DQS - DQS# = –500mV and DQS# - DQS = 500mV. Output slew rateis guaranteed by design but is not necessarily tested on each device.

5.The absolute value of the slew rate as measured from VIL(DC)max to VIH(DC)min is equal to

or greater than the slew rate as measured from VIL(AC)max to VIH(AC)min. This is guaran-teed by design and characterization.

6.IT and AT devices require an additional 0.4 V/ns in the MAX limit when TC is between –

40°C and 0°C.

Figure 16: Output Slew Rate Load

VTT = VDDQ/2Output(VOUT)

25Ω

Reference point

PDF: 09005aef8565148a

1GbDDR2.pdf – Rev. Y 02/14 EN

Preliminary

1Gb: x4, x8, x16 DDR2 SDRAMOutput Driver Characteristics

Output Driver Characteristics

Figure 17: Full Strength Pull-Down Characteristics

120100

80IOUT (mA)60

40

200

0.0

0.5

1.0

VOUT (V)

1.5

Table 21: Full Strength Pull-Down Current (mA)

Voltage (V)0.00.10.20.30.40.50.60.70.80.91.01.11.21.31.41.51.61.71.81.9Min0.004.308.6012.9016.9020.4023.2825.4426.7927.6728.3828.9629.4629.9030.2930.6530.9831.3131.6431.96Nom0.005.6311.3016.5222.1927.5932.3936.4540.3844.0147.0149.6351.7153.3254.956.0357.0758.1659.2760.35Max0.007.9515.9023.8531.8039.7547.7055.5562.9569.5575.3580.3584.5587.9590.7093.0095.0597.0599.05101.05PDF: 09005aef8565148a

1GbDDR2.pdf – Rev. Y 02/14 EN

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