乐曲硬件演奏电路的VHDL设计--程序

1.Songer顶层文件模块:

LIBRARY IEEE; -- 硬件演奏电路顶层设计 USE IEEE.STD_LOGIC_1164.ALL;

ENTITY Songer IS

PORT ( CLK4MHZ : IN STD_LOGIC; --音调频率信号 CLK8HZ : IN STD_LOGIC; --节拍频率信号 pause: IN STD_LOGIC;

CODE1 : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);-- 简谱码输出显示 HIGH1 : OUT STD_LOGIC; --高8度指示 SPKOUT : OUT STD_LOGIC );--声音输出 END;

ARCHITECTURE one OF Songer IS COMPONENT NoteTabs

PORT ( clk : IN STD_LOGIC;

SWITCH: IN STD_LOGIC;

ToneIndex : OUT STD_LOGIC_VECTOR (3 DOWNTO 0) ); END COMPONENT;

COMPONENT ToneTaba

PORT ( Index : IN STD_LOGIC_VECTOR (3 DOWNTO 0) ; CODE : OUT STD_LOGIC_VECTOR (3 DOWNTO 0) ; HIGH : OUT STD_LOGIC;

Tone : OUT STD_LOGIC_VECTOR (10 DOWNTO 0) ); END COMPONENT;

COMPONENT Speakera

PORT ( clk : IN STD_LOGIC;

Tone : IN STD_LOGIC_VECTOR (10 DOWNTO 0); SpkS : OUT STD_LOGIC ); END COMPONENT;

SIGNAL Tone : STD_LOGIC_VECTOR (10 DOWNTO 0);

SIGNAL ToneIndex : STD_LOGIC_VECTOR (3 DOWNTO 0);

BEGIN

u1 : NoteTabs PORT MAP (clk=>CLK8HZ, SWITCH=>pause,ToneIndex=>ToneIndex); u2 : ToneTaba PORT MAP (Index=>ToneIndex,Tone=>Tone,CODE=>CODE1,HIGH=>HIGH1); u3 : Speakera PORT MAP(clk=>CLK4MHZ,Tone=>Tone, SpkS=>SPKOUT ); END;

2.音乐节拍和音调发生器（NoteTabs.VHD）

LIBRARY IEEE;

USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY NoteTabs IS

PORT ( clk : IN STD_LOGIC; switch: IN STD_LOGIC;

ToneIndex : OUT STD_LOGIC_VECTOR (3 DOWNTO 0) ); END;

ARCHITECTURE one OF NoteTabs IS

COMPONENT MUSIC --音符数据ROM PORT(address : IN STD_LOGIC_VECTOR (7 DOWNTO 0);

inclock : IN STD_LOGIC ;

q : OUT STD_LOGIC_VECTOR (3 DOWNTO 0));

END COMPONENT;

SIGNAL Counter : STD_LOGIC_VECTOR (7 DOWNTO 0); BEGIN

CNT8 : PROCESS(clk,Counter)

BEGIN

IF Counter=138 THEN Counter <= \ ELSIF (clk'EVENT AND clk = '1') THEN IF switch = '1' THEN Counter <= Counter+1; END IF;

END IF; END PROCESS;

u1 : MUSIC PORT MAP(address=>Counter , q=>ToneIndex, inclock=>clk); END;

3.简谱码对应的分频预置数查表电路（ToneTaba.VHD）

LIBRARY IEEE;

USE IEEE.STD_LOGIC_1164.ALL;

ENTITY ToneTaba IS

PORT ( Index : IN STD_LOGIC_VECTOR (3 DOWNTO 0) ; CODE : OUT STD_LOGIC_VECTOR (6 DOWNTO 0) ; HIGH : OUT STD_LOGIC;

Tone : OUT STD_LOGIC_VECTOR (10 DOWNTO 0) ); END;

ARCHITECTURE one OF ToneTaba IS BEGIN

Search : PROCESS(Index)

BEGIN

CASE Index IS -- 译码电路，查表方式，控制音调的预置数 WHEN \

WHEN \ WHEN \ WHEN \ WHEN \ WHEN \ WHEN \ WHEN \ WHEN \ WHEN \ WHEN \ WHEN \ WHEN \ WHEN OTHERS => NULL; END CASE; END PROCESS; END;

4.数控分频与演奏发生器（Speakera.VHD）

LIBRARY IEEE;

USE IEEE.STD_LOGIC_1164.ALL;

USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY Speakera IS

PORT ( clk : IN STD_LOGIC;

Tone : IN STD_LOGIC_VECTOR (10 DOWNTO 0); SpkS : OUT STD_LOGIC ); END;

ARCHITECTURE one OF Speakera IS

SIGNAL PreCLK, FullSpkS : STD_LOGIC; BEGIN

DivideCLK : PROCESS(clk)

VARIABLE Count4 : STD_LOGIC_VECTOR (3 DOWNTO 0) ; BEGIN

PreCLK <= '0'; -- 将CLK进行16分频，PreCLK为CLK的16分频 IF Count4>11 THEN PreCLK <= '1'; Count4 := \

ELSIF clk'EVENT AND clk = '1' THEN Count4 := Count4 + 1; END IF; END PROCESS;

GenSpkS : PROCESS(PreCLK, Tone)-- 11位可预置计数器

VARIABLE Count11 : STD_LOGIC_VECTOR (10 DOWNTO 0); BEGIN

IF PreCLK'EVENT AND PreCLK = '1' THEN

IF Count11 = 16#7FF# THEN Count11 := Tone ; FullSpkS <= '1'; ELSE Count11 := Count11 + 1; FullSpkS <= '0'; END IF; END IF; END PROCESS;

DelaySpkS : PROCESS(FullSpkS)--将输出再2分频，展宽脉冲，使扬声器有足够功率发音

VARIABLE Count2 : STD_LOGIC; BEGIN

IF FullSpkS'EVENT AND FullSpkS = '1' THEN Count2 := NOT Count2; IF Count2 = '1' THEN SpkS <= '1'; ELSE SpkS <= '0'; END IF; END IF; END PROCESS; END;

5. 《梁祝》music.vhd(音乐数据):

将数据保存为.mif格式然后制作成LMP_ROM文件。

width=4; depth=256;

address_radix=dec; data_radix=dec; content begin

00:3;01:3;02:3;03:3;04:5;05:5;06:5;07:6;08:8;09:8;

10:8;11:9;12:6;13:8;14:5;15:5;16:12;17:12;18:12;19:15; 20:13;21:12;22:10;23:12;24:9;25:9;26:9;27:9;28:9;29:9; 30:9;31:0;32:9;33:9;34:9;35:10;36:7;37:7;38:6;39:6; 40:5;41:5;42:5;43:6;44:8;45:8;46:9;47:9;48:3;49:3; 50:8;51:8;52:6;53:5;54:6;55:8;56:5;57:5;58:5;59:5;

60:5;61:5;62:5;63:5;64:10;65:10;66:10;67:12;68:7;69:7; 70:9;71:9;72:6;73:8;74:5;75:5;76:5;77:5;78:5;79:5; 80:3;81:5;82:3;83:3;84:5;85:6;86:7;87:9;88:6;89:6; 90:6;91:6;92:6;93:6;94:5;95:6;96:8;97:8;98:8;99:9;

100:12;101:12;102:12;103:10;104:9;105:9;106:10;107:9;108:8;109:8; 110:6;111:5;112:3;113:3;114:3;115:3;116:8;117:8;118:8;119:8; 120:6;121:8;122:6;123:5;124:3;125:5;126:6;127:8;128:5;129:5; 130:5;131:5;132:5;133:5;134:5;135:5;136:0;137:0;138:0; end;

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