cd $IDIR/glibc-1.09
configure --prefix=$IDIR/ssbig-na-sstrix
ssbig-na-sstrix
under Contract DABT63-95-C-0127 and ARPA order no. D346. The current support for this work comes from a variety of sources, all of to which we are indebted.
setenv CC $IDIR/bin/ssbig-na-sstrix-gccunsetenv TZ
unsetenv MACHINEmake
make install
Note that you must have already built the SimpleScalar simula-tors to build this library, since the glibc build requires a compiledsimulator to test target machine-speci c parameters such asendian-ness.
If you have FORTRAN benchmarks, you will need to buildf2c:
cd $IDIR/f2c-1994.09.27make
make install
The entire tool set should now be ready for use. We provide pre-compiled test binaries (big- and little-endian) and their sources in$IDIR/simplesim2.0/tests). To run a test:
cd $IDIR/simplesim-2.0
sim-safe tests/bin.big/test-math
description of each. Both the number and the semantics of theregisters are identical to those in the MIPS-IV ISA.
In Figure3, we depict the three instruction encodings of Sim-pleScalar instructions:register,immediate, andjump formats. Allinstructions are 64 bits in length.
The register format is used for computational instructions.The immediate format supports the inclusion of a 16-bit constant.The jump format supports speci cation of 24-bit jump targets.The register elds are all 8 bits, to support extension of the archi-tected registers to 256 integer and oating point registers. Eachinstruction format has a xed-location, 16-bit opcode eld thatfacilitates fast instruction decoding.
Theannote eld is a 16-bit eld that can be modi ed post-compile, with annotations to instructions in the assembly les.The annotation interface is useful for synthesizing new instruc-tions without having to change and recompile the assembler.Annotations are attached to the opcode, and come in two avors:bit and eld annotations. A bit annotation is written as follows:
lw/a
$r6,4($r7)
The test should generate about a page of output, and will run veryquickly. The release has been ported to—and should run on—thefollowing systems:- gcc/AIX 413/RS6000- xlc/AIX 413/RS6000- gcc/HPUX/PA-RISC- gcc/SunOS 4.1.3/SPARC- gcc/Linux 1.3/x86- gcc/Solaris 2/SPARC- gcc/Solaris 2/x86
- gcc/DEC Unix 3.2/Alpha- c89/DEC Unix 3.2/Alpha- gcc/FreeBSD 2.2/x86- gcc/WindowsNT/x86
The annotation in this example is /a. It speci es that the rst bitof the annotation eld should be set. Bit annotations /a through /pset bits 0 through 15, respectively. Field annotations are writtenin the form:
lw/6:4(7)
$r6,4($r7)
3 The Simplescalar architecture
The SimpleScalar architecture is derived from the MIPS-IVISA [4]. The tool suite de nes both little-endian and big-endianversions of the architecture to improve portability (the versionused on a given host machine is the one that matches the endian-ness of the host). The semantics of the SimpleScalar ISA are asuperset of MIPS with the following notable differences andadditions: There are no architected delay slots: loads, stores, and con-trol transfers do not execute the succeeding instruction. Loads and stores support two addressing modes—for all
data types—in addition to those found in the MIPS architec-ture. These are: indexed (register+register), and auto-incre-ment/decrement. A square-root instruction, which implements both single-and double-precision oating point square roots. An extended 64-bit instruction encoding.
We list all SimpleScalar instructions in Figure2. We providea complete list of the instruction semantics (as implemented inthe simulator) in AppendixA. In Table1, we list the architectedregisters in the SimpleScalar architecture, their hardware andsoftware names (which are recognized by the assembler), and a
This annotation sets the speci ed 3-bit eld (from bit 4 to bit 6within the 16-bit annotation eld) to the value 7.
System calls in SimpleScalar are managed by a proxy handler(located insyscall.c) that intercepts system calls made bythe simulated binary, decodes the system call, copies the systemcall arguments, makes the corresponding call to the host’s operat-ing system, and then copies the results of the call into the simu-lated program’s memory. If you are porting SimpleScalar to anew platform, you will have to code the system call translationfrom SimpleScalar to your host machine insyscall.c. A listof all SimpleScalar system calls is provided in AppendixB.
SimpleScalar uses a 31-bit address space, and its virtualmemory is laid out as follows:
0x000000000x004000000x100000000x7fffc000
Unused
Start of text segmentStart of data segmentStack base (grows down)
The top of the data segment (which includes init and bss) is heldinmem_brk_point. The areas below the text segment andabove the stack base are unused.
4 Simulator internals
In this section, we describe the functionality of the processorsimulators that accompany the tool set. We describe each of thesimulators, their functionality, command-line arguments, andinternal structures.
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