The simplescalar tool set, version 2.0(9)

described in Section4.3.The cache con guration (<con g>) is formatted as follows:

<name>:<nsets>:<bsize>:<assoc>:<repl>

4.1 Functional simulation

The fastest, least detailed simulator (sim-fast) resides insim-fast.c.sim-fast does no time accounting, only func-tional simulation—it executes each instruction serially, simulat-ing no instructions in parallel.sim-fast is optimized for rawspeed, and assumes no cache, instruction checking, and has nosupport for DLite!.

A separate version ofsim-fast, calledsim-safe, also performsfunctional simulation, but checks for correct alignment andaccess permissions for each memory reference. Although similar,sim-fast andsim-safe are split (i.e., protection is not toggledwith a command-line argument in a merged simulator) to maxi-mize performance. Neither of the simulators accept any addi-tional command-line arguments. Both versions are very simple:less than 300 lines of code—they therefore make good startingpoints for understanding the internal workings of the simulators.In addition to the simulator le, bothsim-fast andsim-safe usethe following code les (not including header les):main.c,syscall.c,memory.c,regs.c,loader.c,ss.c,endian.c, andmisc.c.sim-safe also usesdlite.c.

Each of these elds has the following meaning:<name>cache name, must be unique.<nsets>number of sets in the cache.<bsize>block size (for TLBs, use the page size).<assoc>associativity of the cache (power of two).<repl>replacement policy (l | f | r), where

l = LRU,f = FIFO,r = random replacement.

The cache size is therefore the product of <nsets>, <bsize>, and<assoc>. To have a uni ed level in the hierarchy, “point” theinstruction cache to the name of the data cache in the correspond-ing level, as in the following example:

-cache:il1 il1:128:64:1:l-cache:il2 dl2

-cache:dl1 dl1:256:32:1:l-cache:dl2 ul2:1024:64:2:l

The defaults used insim-cache are as follows:L1 instruction cache:L1 data cache:L2 uni ed cache:instruction TLB:data TLB:

il1:256:32:1:ldl1:256:32:1:lul2:1024:64:4:litlb:16:4096:4:ldtlb:32:4096:4:l

(8 KB)(8 KB)(256 KB)(64 entries)(128 entries)

4.2 Cache simulation

The SimpleScalar distribution comes with two functionalcache simulators;sim-cache andsim-cheetah. Both use the lecache.c, and they usesim-cache.c andsim-chee-tah.c, respectively. These simulators are ideal for fast simula-tion of caches if the effect of cache performance on execution

sim-cheetah is based on work performed by Ragin Sugumar andSantosh Abraham while they were at the University of Michigan.It uses their Cheetah cache simulation engine [6] to generate sim-ulation results for multiple cache con gurations with a singlesimulation. The Cheetah engine simulates fully associativecaches ef ciently, as well as simulating a sometimes-optimalreplacement policy. This policy was called MIN by Belady [1],although the simulator refers to it asopt. Opt uses future knowl-edge to select a replacement; it chooses the block that will be ref-erenced the furthest in the future (if at all). This policy is optimalfor read-only instruction streams. It is not optimal for write-backcaches because it may be more expensive to replace a block ref-erenced further in the future if the block must be written back, asopposed to a clean block referenced slightly less far in the future.

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