ADG1611_1612_1613[1](13)

数字模拟开关

ADG1611/ADG1612/ADG1613

07981-029

Figure 30. THD + Noise

VVIN

VS

VIN

VOUT

07981-023

Figure 31. Switching Times

VIN

0V

50%

50%

VV

OUT1

VOUT1

VOUT2

07981-024

Figure 32. Break-Before-Make Time Delay

VINADG1612

ON

OFF

VINVOUT

07981-025

Figure 33. Charge Injection

Rev. A | Page 14 of 16

数字模拟开关

ADG1611/ADG1612/ADG1613

tON

The delay between applying the digital control input and the output switching on. See Figure 31.

tOFF

The delay between applying the digital control input and the output switching off. See Figure 31.

Charge Injection

A measure of the glitch impulse transferred from the digital input to the analog output during switching. See Figure 33. Off Isolation

A measure of unwanted signal coupling through an off switch. See Figure 27.

Crosstalk

A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. See Figure 28.

Bandwidth

The frequency at which the output is attenuated by 3 dB. See Figure 29.

On Response

The frequency response of the on switch. Insertion Loss

The loss due to the on resistance of the switch.

Total Harmonic Distortion + Noise (THD + N)

The ratio of the harmonic amplitude plus noise of the signal to the fundamental. See Figure 30.

AC Power Supply Rejection Ratio (ACPSRR)

The ratio of the amplitude of signal on the output to the amplitude of the modulation. This is a measure of the ability of the part to avoid coupling noise and spurious signals that appear on the supply voltage pin to the output of the switch. The dc voltage on the device is modulated by a sine wave of 0.62 V p-p.

TERMINOLOGY

IDD

The positive supply current. ISS

The negative supply current.

VD (VS)

The analog voltage on Terminal D and Terminal S. RON

The ohmic resistance between Terminal D and Terminal S. RFLAT(ON)

Flatness that is defined as the difference between the maximum and minimum value of on resistance measured over the specified analog signal range.

IS (Off)

The source leakage current with the switch off. ID (Off)

The drain leakage current with the switch off. ID, IS (On)

The channel leakage current with the switch on. VINL

The maximum input voltage for Logic 0. VINH

The minimum input voltage for Logic 1. IINL (IINH)

The input current of the digital input.

CS (Off)

The off switch source capacitance, which is measured with reference to ground.

CD (Off)

The off switch drain capacitance, which is measured with reference to ground.

CD, CS (On)

The on switch capacitance, which is measured with reference to ground. CIN

The digital input capacitance.

Rev. A | Page 15 of 16

搜索“diyifanwen.net”或“第一范文网”即可找到本站免费阅读全部范文。收藏本站方便下次阅读，第一范文网，提供最新高等教育ADG1611_1612_1613[1](13)全文阅读和word下载服务。