GS88136BT-300中文资料(11)

Mode Pin Functions

Mode Name

Pin Name

State

Function

Burst Order Control LBO L Linear Burst H Interleaved Burst Output Register Control FT L Flow Through H or NC Pipeline Power Down Control

ZZ

L or NC Active H

Standby, I DD = I SB

GS88118B(T/D)/GS88132B(T/D)/GS88136B(T/D)

Rev: 1.05 11/200511/39© 2002, GSI Technology

Specifications cited are subject to change without notice. For latest documentation see .

Note:

There is a pull-up device on the FT pin and a pull-down device on the ZZ pin, so this input pin can be unconnected and the chip will operate in the default states as specified in the above tables.Note:

The burst counter wraps to initial state on the 5th clock.Note:

The burst counter wraps to initial state on the 5th clock.

Linear Burst Sequence

A[1:0]A[1:0]A[1:0]A[1:0]

1st address 000110112nd address 011011003rd address 101100014th address

11

00

01

10

Interleaved Burst Sequence

A[1:0]A[1:0]A[1:0]A[1:0]

1st address 000110112nd address 010011103rd address 101100014th address

11

10

01

00

Burst Counter Sequences

BPR 1999.05.18

元器件交易网

搜索“diyifanwen.net”或“第一范文网”即可找到本站免费阅读全部范文。收藏本站方便下次阅读，第一范文网，提供最新资格考试认证GS88136BT-300中文资料(11)全文阅读和word下载服务。