GS88118B(T/D)/GS88132B(T/D)/GS88136B(T/D)
Rev: 1.05 11/200518/39© 2002, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see .
50% tKC
V SS – 2.0 V
50%V SS V IH
Undershoot Measurement and Timing
Overshoot Measurement and Timing
50% tKC
V DD + 2.0 V
50%V DD
V IL
Capacitance
o C, f = 1 MH Z , V DD Parameter
Symbol
Test conditions
Typ.
Max.
Unit
Input Capacitance C IN V IN = 0 V 45pF Input/Output Capacitance C I/O
V OUT = 0 V
6
7
pF
Note:
These parameters are sample tested.AC Test Conditions
Parameter
Conditions
Input high level V DD – 0.2 V Input low level 0.2 V Input slew rate 1 V/ns Input reference level V DD /2Output reference level
V DDQ /2Output load
Fig. 1
Notes:
1.Include scope and jig capacitance.
2.Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted.
3.Device is deselected as defined by the Truth Table.
DQ
V DDQ/2
50?30pF *
Output Load 1
* Distributed Test Jig Capacitance
(T A = 25= 2.5 V)
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