First Write First Read Burst Write Burst Read Deselect
R W
CR
CW
X
X
W R
R W R X X X S i m p l e S y n c h r o n o u s O p e r a t i o n S i m p l e B u r s t S y n c h r o n o u s O p e r a t i o n CR
R CW CR
CR Notes:
1.The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied low.
2.The upper portion of the diagram assumes active use of only the Enable (E1) and Write (B A , B B , B C , B D , BW, and GW) control inputs, and
that ADSP is tied high and ADSC is tied low.
3.The upper and lower portions of the diagram together assume active use of only the Enable, Write, and ADSC control inputs, and
assumes ADSP is tied high and ADV is tied low.
GS88118B(T/D)/GS88132B(T/D)/GS88136B(T/D)
Rev: 1.05 11/200514/39© 2002, GSI Technology Specifications cited are subject to change without notice. For latest documentation see . Simplified State Diagram
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