Fault Sensitivity Analysis and Reliability Enhancement of Analog-to-Digital Converters(9)

Abstract — Reliability of systems used in space, avionic and biomedical applications is highly critical. Such systems consist of an analog front-end to collect data, an Analog-to-Digital Converter (ADC) to convert the collected data to digital form and a

AreaTABLEVII

SENSITIVITIESOFSHASWITHVARYINGINPUTSFOR4-BITFIADC,p=3,q=10,r

=4

Fig.24.ConventionalSampleandHoldAmpli erFig.26.MillerHoldCapacitor

SHA

POF

Fig.25.ClockFeedthroughCancellationSHA

Resistance (in K)

insubsectionII-A)incorporatedthecomparatorproposedbyTabatabaei[18].Eitheroneoftheabovefourimplementationscanbechosenbasedontherequirementsoftheapplication.WehavefoundthatthecomparatorproposedbyHester[20]andthedifferentialone[8]aretheleastsensitiveamongtheimple-mentationsconsidered.Sensitivitygainsofasmuchas89%wereobserved.Thedifferentialimplementationalsoshowedanimprovementof50%intheMRE.Theimprovementinsen-sitivityisachievedwithapenaltyintermsofarea(seeTableV).However,thelesssensitivecomparatorshavealsoalowerdelay.AlesserareaoverheadisobservedinHester’simplemen-tationwithalmostcomparablesensitivityimprovement.TableVIshowstheeffectonthesensitivityofthewholeADC.Sincethecomparatorsarethecriticalblocksinthe ashADC,asim-ilarsensitivityimprovementisobservedforthewholeADC.2)FoldingandInterpolatingADC:Thesensitivityanalysisofthe4-bitFIADChasidenti edthesampleandholdam-pli er(SHA)asacriticalblock.ThreeimplementationswereconsideredtoidentifythemostrobustSHA.Figure24showstheconventionalimplementation[8]oftheSHA.Thisimple-mentationissusceptibletoclockfeedthroughwhichcausesanextrachargeofQch/2(Qchisthechannelcharge)ontheholdcapacitor(Ch)wheneverCk

turnsthesamplingswitchoff.Animplementation[22]whichalleviatestheproblemofclockfeedthrough(seeFigure25)usesadummyswitch(Q2)with(W/L)Q2=0.5·(W/L)Q1.Thedummyswitchturnsonwhen-Fig.27.Variationinsensitivitywithincreasingresistance(R),p=3,q=8,r=32

everthesamplingswitch(Q1)turnsoffandabsorbsthechannelcharge(Qch/2)releasedbyQ1,leavingtheholdcapacitorun-affected.

Sincetheholdingcapacitorhastoholdthesampledvalueforsometime,itsvalueisusuallylarge.However,alargervalueoftheholdingcapacitoralsoimpliesthattheacquisitiontimeforsamplingtheinputwillincrease.Analternateimplementation(Figure26)[23]changesthecon gurationinthesampleandholdmodessothattheinputseesasmallcapacitanceinthesamplingmodewithoutsacri cingintermsoftheholdtime.Thefollowingexpressionsshowthevaluesoftheacquisition(Cacq)andthehold(Chold)capacitancesinthiscon guration:Cacq=C1+C2,

Chold=(1+A)·

C1C2C1+C2

(10)

whereAisthegainoftheoperationalampli er.

TableVIIshowstheresultsofthesensitivityanalysisoftheabovethreepossibleimplementationsoftheSHA.McCreary’s[22]implementationshowsa19.8%sensitivityimprovementovertheconventional[8]implementation.Inaddition,italsoshowsanimprovementof11%intheMRE.Ithowever,con-sumesmoreareaandincursahigherdelay.AlthoughLim’s[23]implementationshowsahigherimprovementinsensitiv-ity,itconsumesmuchmoreareathanMcCreary’simplemen-

搜索“diyifanwen.net”或“第一范文网”即可找到本站免费阅读全部范文。收藏本站方便下次阅读，第一范文网，提供最新高等教育Fault Sensitivity Analysis and Reliability Enhancement of Analog-to-Digital Converters(9)全文阅读和word下载服务。