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Fault Sensitivity Analysis and Reliability Enhancement of Analog-to-Digital Converters(13)

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Abstract — Reliability of systems used in space, avionic and biomedical applications is highly critical. Such systems consist of an analog front-end to collect data, an Analog-to-Digital Converter (ADC) to convert the collected data to digital form and a

0.070.060.050.040.030.020.010

"1pc""2pc""4pc""6pc""8pc"

V.CONCLUSIONS

AgenericmethodologyforthereliabilityenhancementofADCshasbeenpresented.Faultsensitivityanalysisfollowedbycircuitredesignwasidenti edasthefaulttolerancestrategytobeapplied.Theuseofnodeweights,speci ctoα-particletransients,wasproposedtoincreasetheaccuracyofthesensi-tivityanalysis.Twometrics,namelythePOFandAREwhichcharacterizethesensitivityofablock,werepresented.Thefol-lowingstepshavebeenidenti edforα-particleinducedfaultsensitivityanalysis:

(i)Calculateweightsofthenodes.

(ii)Performtransientfaultsimulationsonallnodes.

(iii)Useequation(6)or(8)tocalculatethesensitivityofthe

constituentblocks.

Thismethodologywasusedto rstidentifycriticalblocksintheFI,SA, ashand -ΣADCsandthenincreasetheirrelia-bilitybycircuitredesign.Severalredesigntechniqueswerepre-sentedincludingtheselectionofmorerobustimplementations,addingredundancy,patterndetectionandtransistorsizing,us-ingwhich,sensitivitygainsofasmuchas89%,65.8%,67.8%and60%,respectively,wereobserved.EachoftheproposedcircuitredesigntechniquescanbeusedforotherADCs.Forexample,theSHAandcomparatoraresomeofthemostubiq-uitousblocksinADCsandnumerouscircuitimplementationshavebeenproposed.Thus,severalalternativerobustimplemen-tationsofthesecanbeevaluatedformostADCs.Theproposedredundancytechniquewillbeusefulincircuitswherethenodevoltageshavetobeheldtoaconstantvalueforasubstantialamountoftime(likeinthe -Σmodulator).PatterndetectioncanbeusedinADCswherethesignallinesattheboundarybetweentheanaloganddigitalblocksarelimitedtocertainpat-terns(likethe ashandFIADCs).Lastly,transistorsizingwasfoundtobebene cialforbothdigitalandanalogcircuitsundercertaincircumstances.

VI.FUTUREWORK

ADCarchitectureslikethepipelined,multi-stepandintegrat-ingADCscanbesimilarlyanalyzedfortheirsensitivitiestoα-particletransients.Itisalsonecessarytostudytheimpactofparametricvariationsinmixed-signalcircuitsonthesensitiv-itytoα-particletransients.Currently,thisworkassumesthatthecircuitundertestisproperlycenteredintheprocessenve-lope.Initialsimulationsbyvaryingthewidthandthethresh-oldvoltageofthetransistorsinacomparatorhaveshownthatsometimesan“uncentered”designcanhavealowerratherthanhighersensitivitytoα-particletransients.Inmostofthecaseshowever,thevariationwassmallforthetypeofparametricvari-ationsconsidered.Allinall,thereisaneedtostudythesen-sitivityofsocalled“uncentered”designstoα-particleinducedtransients.Finally,thisworkcanbeextendedforothertypesoftransientfaultsbydevelopingappropriatemodelsforthecandi-datefaults.

REFERENCES

[1]H.BallandF.Hardy,“Effectsanddetectionofintermittentfailuresin

digitalsystems,”inProc.ofFJCC,AFIPSConf.,Vol.351969,pp.329–335.

Average Relative Error

12

Sizing Factor

3456

Fig.38.AnalogBlockAREvariationwithsizingandinjectionlevels,p=3,q=14,r=4

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POF

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12

Sizing Factor

3456

Fig.39.AnalogBlockPOFvariationwithsizingandinjectionlevels,p=3,q=14,r=4

tivenodesprovedbene cialwhileforhigherinjectionlevels(≥2pC)resizingtheleastsensitivemnodesinthesortedlistofnprovedbene cial.Theselectivenodeselectionstrategyprovidessensitivitygainswithminimumareaoverheadamongthetwostrategiesconsidered.Thisisanexampleofastrategyforeffectivenodeselectionforreliabilityenhancement.

2)AnalogCircuits:Thistechniquewasimplementedforthecomparatorswhichwereidenti edasthecriticalblocksinthe4-bitFlashADC.Figure38showsthatanimprovementofaround50%inAREcanbeachievedbysizingforinjectionlev-elsboundedby1pC.However,theAREincreaseswithsizingforinjectionlevelsabove4pC.AninterestingpointtonotehereisthatthePOFmetric(seeFigure39)indicatesthatthesensitivitydoesnotchangebymuchforasizingfactorof2foraninjectionboundedby1pC.Thisimpliesthatthenum-berofinjectedfaultstranslatingtoerrorsstillremainsaboutthesamebutthemagnitudeoferrorduetoeachofthosefaultshasreduced,thusresultinginanoverallreductionof50%intheARE(seeFigure38).Furtherreductioninsensitivityforahighersizingratioissmallerbecauseincreasingthewidthofthetransistorinananalogcircuitentailsincreasingitslengthalso,sincetheW/Lratiosmustbemaintained.Thisimpliesthattheresistanceposedbythetransistorwillnotchange,butthecapacitanceseenbythenodewillincrease,thuscausingareductioninthesensitivityinsomecasesasshowninFigure38.

Therefore,sensitivitygainscanbeattainedforlowerinjec-tionlevels(≤2pC)butastheinjectionlevelboundincreasesthistechniquedoesnotprovebene cial.

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